Connecting an increasing number of electrically-powered devices to the grid is leading to a substantial distortion of the electrical grid. This, in turn, is causing problems in the distribution of the electrical network. Therefore, most engineers resort to advanced power factor correction circuitry in power supply designs that can meet power factor standards strictly for mitigating these issues.
Most power factor correction methods popularly use the boost PFC topology. However, with the advent of wide band-gap semiconductors, like silicon carbide and gallium nitride, it is becoming easier to implement bridge-less topologies also, including the column PFC. With advanced column controllers, it is now possible to simplify the control over complex designs of the interleaved column PFC.
At present, the interleaved boost PFC is the most common topology that engineers use for power factor correction. They use a rectifying diode bridge for converting AC voltage to DC. A boost converter then steps up the DC voltage to a higher value, while converting it to a sinusoidal waveform. This has the effect of reducing the ripple on the output voltage while offering a sinusoidal waveform for the current.
Although it is possible to achieve power factor correction with only a single boost converter, engineers often use two or more converters in parallel. Each of these converters is given a phase shift to improve its efficiency and reduce the ripple on the input current. This topology is known as interleaving.
With new families of semiconductors, especially the silicon carbide type, creating power switches offers substantial improvements in their thermal and electrical characteristics. Using the new type of semiconductors, it is becoming possible to integrate the rectification and boost stages, along with two switching branches for operating at different frequencies. This is the bridge-less column PFC topology.
One of the two branches is the slow branch, and it commutates at the grid frequency, typically 50 or 60 Hz. This branch operates with traditional silicon switches, while it is primarily responsible for input voltage rectification. The second branch is the fast branch and is responsible for stepping up the voltage. Switching at very high frequencies like 100 kHz, this branch places great thermal and electrical strain on the semiconductor switches. For safe and efficient performance, engineers prefer to use wide band-gap semiconductor switches, such as GaN and SiC MOSFETs, in the second branch.
The bridge-less column PFC topology improves the performance in comparison with the interleaved boost converter. But the control circuitry is more complex due to the presence of additional active switches. Therefore, engineers often integrate the column controller to mitigate the issue.
It is possible to add more high-frequency branches for improving the efficiency of the bridge-less column PFC. Such additions help in reducing the ripple on the output voltage of the converter while distributing the power requirements equally among the branches. Such an arrangement minimizes the overall costs while reducing the layout.
Although it is possible to reach general conclusions about each topology by comparing their performance, this largely depends on the device selection and its operating parameters. Therefore, designers must be careful in considering the design for implementation.
