During a chip’s lifetime, there can be a wide variety of issues cropping up. Engineers are using sensors that can address them. As the semiconductor ecosystem touches a wide application space, sensors, and in-circuit monitors are playing an increasing role in managing the silicon lifecycle, thereby improving its resiliency and reliability.
Engineers are expecting a drastic improvement in the reliability of electronic devices with the addition of these sensors and in-circuit monitors. These expectations are due to a combination of sensor placements in true system-level design, in- and on-chip monitors, and an improvement in data analysis.
In the future, with engineers placing more monitors and sensors at strategic locations for collecting data, the combination, and analysis of this data is likely to increase tremendously. In addition, this will lead to a much more detailed understanding of what goes wrong in real time in the life of a semiconductor. Important to note, this is likely to open the door to recovery schemes for keeping devices functioning until they are due for replacement or repair.
All of the above depends on the complexity of the product. Although some regulatory standards for miniaturization are under study, the complexity of the product drives the use of sensors and in-circuit monitors. With consumers wanting greater capabilities in their hands, the requirement is going to increase substantially.
Although users were not interested earlier in concepts like resilience, predictability, and observability, things are changing fast. Chip architects are paying more attention to how systems and devices behave over time, including issues such as silent data corruption. Where earlier, it was hard to articulate the business reasons for such inclusion, chip architects are realizing there are missing pieces. While it is still a tussle between the why and how much, the realization is dawning that it is impossible to have all the computing resources or complex monitors-on-chip that can tackle all scenarios. Especially when such additions need real estate and power to function.
Designers are beginning to realize that advanced design techniques, in conjunction with manufacturing complexities and the latest process nodes, are leading to new challenges. These challenges appear as variable power consumption and affect the useful life of the semiconductor. The power consumption pattern and performance characteristics of a chip change as it travels along the silicon value chain. The variation starts with the pre-silicon design, moving on to new-product bring-up, to system integration, and finally, to its in-field usage.
Monitoring the way a chip degrades over time, can throw light on many types of semiconductor failures, especially with BTI or bias temperature instability. Using in-circuit monitors, it is now possible to measure areas that show performance and power degradation, on-die temperature variations, and workload stress, and monitor die-to-die interconnects for heterogeneous designs. Mission-critical systems define specifications such as safety and reliability as the key differentiating parameters. Moreover, with device functionality degrading over time, it is necessary to evolve tests that include lifetime operation as well.
The industry is now widely adopting an approach that includes more and more sensors and in-circuit monitors for electronic devices to monitor the most prominent slack paths.
